/****************************************************************************/
/* Copyright 2010, © Bendor Research Pty. Ltd. All rights reserved.			*/
/* Permission is granted to use this software for any purpose whatsoever	*/
/* as long as this copyright notice is preserved. The code is provided		*/
/* "as is", with no explicit, implicit or implied warranty or guarantee		*/
/* of any kind and Bendor Research Pty. Ltd. can not be held liable for		*/
/* any loss or damages arising out of the use of this software.				*/
/****************************************************************************/
/*																			*/
/*	Definitions for Micrel KS8721BKL/SL RMII chip							*/
/*	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~							*/
/*																			*/
/*	2006 Mar	ZK		Original											*/
/*																			*/
/****************************************************************************/

#ifndef _KS8721_H
#define _KS8721_H

/*
*	Get the standard MII register set
*/

#include <chips/mii.h>

/*
*	PHY identifier for the chip
*/

#define	MICREL_OUI				0x0010a1
#define	KS8721_PHY_ID			0x00421619

/*
*	Vendor-specific registers
*/

#define	KS8721_RXER				0x15	// RX error counter
#define	KS8721_IRQ				0x1b	// Interrupt control/status
#define	KS8721_PHY				0x1f	// 100BASE-TX PHY control register

/*
*	Interrupt control register
*/

#define	KS8721_IRQ_JIE			0x8000	// Jabber interrupt enable
#define	KS8721_IRQ_REIE			0x4000	// Receive error interrupt enable
#define	KS8721_IRQ_PRIE			0x2000	// Page received interrupt enable
#define	KS8721_IRQ_PDFIE		0x1000	// Parallel detect fault interrupt ena
#define	KS8721_IRQ_LPAIE		0x0800	// Link partner ack interrupt enable
#define	KS8721_IRQ_LDIE			0x0400	// Link down interrupt enable
#define	KS8721_IRQ_RFIE			0x0200	// Remote fault interrupt enable
#define	KS8721_IRQ_LUIE			0x0100	// Link up interrupt enable
#define	KS8721_IRQ_JI			0x0080	// Jabber interrupt
#define	KS8721_IRQ_REI			0x0040	// Receive error interrupt
#define	KS8721_IRQ_PRI			0x0020	// Page received interrupt
#define	KS8721_IRQ_PDFI			0x0010	// Parallel detect fault interrupt
#define	KS8721_IRQ_LPAI			0x0008	// Link partner ack interrupt
#define	KS8721_IRQ_LDI			0x0004	// Link down interrupt
#define	KS8721_IRQ_RFI			0x0002	// Remote fault interrupt
#define	KS8721_IRQ_LUI			0x0001	// Link up interrupt

/*
*	PHY control/status register
*/

#define	KS8721_PHY_SWAPDIS		0x2000	// Disable pair swap
#define	KS8721_PHY_ENERGY		0x1000	// Energy detect
#define	KS8721_PHY_FORCE		0x0800	// Force link test pass
#define	KS8721_PHY_PSAVE		0x0400	// Enable power-save mode
#define	KS8721_PHY_IRQLEV		0x0200	// Interrupt pin active level
#define	KS8721_PHY_JCNTE		0x0100	// Enable jabber counter
#define	KS8721_PHY_AN_DONE		0x0080	// Auto-negotiation complete
#define	KS8721_PHY_FLOW			0x0040	// Flow-control is available
#define	KS8721_PHY_ISOLATED		0x0020	// PHY is isolated
#define	KS8721_PHY_MODE_MSK		0x001c	// Current mode mask
#define	KS8721_PHY_MODE_AN		0x0000	// Still in auto-negotiation
#define	KS8721_PHY_MODE_10T_H	0x0004	// 10BASE-T half duplex
#define	KS8721_PHY_MODE_100TX_H	0x0008	// 100BASE-TX half duplex
#define	KS8721_PHY_MODE_10T_F	0x0014	// 10BASE-T full duplex
#define	KS8721_PHY_MODE_100TX_F	0x0018	// 100BASE-TX full duplex
#define	KS8721_PHY_MODE_ISO		0x001c	// PHY isolate
#define	KS8721_PHY_SQE			0x0002	// Enable SQE test
#define	KS8721_PHY_DS_DIS		0x0001	// Disable data scrambler

#endif

