/****************************************************************************/
/* Copyright 2010, © Bendor Research Pty. Ltd. All rights reserved.			*/
/* Permission is granted to use this software for any purpose whatsoever	*/
/* as long as this copyright notice is preserved. The code is provided		*/
/* "as is", with no explicit, implicit or implied warranty or guarantee		*/
/* of any kind and Bendor Research Pty. Ltd. can not be held liable for		*/
/* any loss or damages arising out of the use of this software.				*/
/****************************************************************************/
/*																			*/
/*	Include file describing the Philips LPC23xx external memory controller	*/
/*	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	*/
/*																			*/
/*	2010 Mar	ZK		Original											*/
/*	2010 May	ZK		Modified to match NXP's names						*/
/*																			*/
/****************************************************************************/

#ifndef _LPC23XX_EMC
#define _LPC23XX_EMC

/*
*	Memory block configuration
*/

struct emc_blk {

	unsigned conf;					// Block configuration
	unsigned wait_wen;				// CS assert to WE assert delay
	unsigned wait_oen;				// CS assert to OE assert delay
	unsigned wait_rd;				// CS assert to OE negate delay
	unsigned page;					// Page mode access delay
	unsigned wait_wr;				// CS assert to WE negate delay
	unsigned wait_turn;				// Bus turn-around delay
	unsigned _;
};

/*
*	External memory controller registers
*/

struct lpc23xx_emc {

	unsigned ctrl;					// General control
	unsigned stat;					// Controller status
	unsigned conf;					// Endiannes
	unsigned _1[29];
	unsigned extended_wait;			// Extended wait time
	unsigned _2[95];
	struct emc_blk blk[ 2 ];		// The two memory block descriptors
};

/*
*	Definitions for the config register
*/

#define	EMC_CONFIG_ENDIAN_MODE	0x01	// Endiannes (1:big, 0:little)

/*
*	Definitions for the status register
*/

#define	EMC_STAT_B				0x01	// EMC is busy with a transaction
#define	EMC_STAT_S				0x02	// Write buffer is not empty
#define	EMC_STAT_SA				0x04	// Self-resfresh mode enabled

/*
*	Definitions for the control register
*/

#define	EMC_CTRL_E				0x01	// EMC is enabled
#define	EMC_CTRL_M				0x02	// nCS0 mirrors nCS1
#define	EMC_CTRL_L				0x04	// EMC is in low-power mode

/*
*	Definitions for the blk[].config register
*/

#define	EMC_BLK_CONF_PM		0x000008	// Memory supports 4-cycle bursts
#define	EMC_BLK_CONF_PC		0x000040	// CS polarity (1:active high)
#define	EMC_BLK_CONF_EW		0x000100	// Extended wait
#define	EMC_BLK_CONF_B		0x080000	// Buffer enable
#define	EMC_BLK_CONF_P		0x100000	// Write protect enabled

/*
*	EMC instance
*/

static volatile struct lpc23xx_emc * const lpc_emc = (void *) 0xffe08000;

#endif

