/****************************************************************************/
/*	Copyright (c) 2009, Bendor Research Pty. Ltd. All rights reserved.		*/
/*	This software is released under the GNU General Public License, version	*/
/*	3, with the exemptions that 1) the header files installed by this 	 	*/
/*	package can be included in closed-source code and 2) the libraries		*/
/*	built by this package can be statically linked into a closed-source 	*/
/*	binary. See the file LICENSE for the details.							*/
/*	This software is provided "AS IS", without any warranty or guarantee.	*/
/*	By using this software you acknowledge that neither Bendor Research nor	*/
/*	any of its personnel or affiliates can be held liable for any damages,	*/
/*	including, but not limited to, loss of business, loss of money, loss of */
/*	life, loss or reputation, arising out of this software being faulty or	*/
/*	not performing as advertised, even if Bendor Research was aware of such	*/
/*	faults in the software. You use this software at your own risk, any and */
/*	all liabilities that arise out of your using this software are strictly	*/
/*	yours.																	*/
/****************************************************************************/

#ifndef __ARM_DEFS_H__
#define __ARM_DEFS_H__

/*
*	ARM status register fields.
*/

#define	ARM_IRQDI_MASK	0x00000080	// IRQ disable flag
#define	ARM_FIQDI_MASK	0x00000040	// FIQ disable flag
#define	ARM_THUMB_MASK	0x00000020	// THUMB mode flag
#define	ARM_STATE_MASK	0x0000001f	// Operating mode mask
#define	ARM_NFLAG_MASK	0x80000000	// Negative flag
#define	ARM_ZFLAG_MASK	0x40000000	// Zero flag
#define	ARM_CFLAG_MASK	0x20000000	// Carry flag
#define	ARM_VFLAG_MASK	0x10000000	// Overflow flag

/*
*	ARM operating modes.
*/

#define	ARM_STATE_USR	0x10		// User mode
#define	ARM_STATE_SYS	0x1f		// System mode (user with privileges)
#define	ARM_STATE_SUP	0x13		// Supervisor mode (SWI service)
#define	ARM_STATE_FIQ	0x11		// FIQ exception service
#define	ARM_STATE_IRQ	0x12		// IRQ exception service
#define	ARM_STATE_ABT	0x17		// Abort exception service (data/prefetch)
#define	ARM_STATE_UND	0x1b		// Undefined insn exception service

#endif

