/****************************************************************************/
/* Copyright 2010, © Bendor Research Pty. Ltd. All rights reserved.			*/
/* Permission is granted to use this software for any purpose whatsoever	*/
/* as long as this copyright notice is preserved. The code is provided		*/
/* "as is", with no explicit, implicit or implied warranty or guarantee		*/
/* of any kind and Bendor Research Pty. Ltd. can not be held liable for		*/
/* any loss or damages arising out of the use of this software.				*/
/****************************************************************************/
/*																			*/
/*	Include file describing the NXP LPC210x watchdog timer					*/
/*	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~					*/
/*																			*/
/*	2011 Jan	ZK		Generated from the LPC23xx version					*/
/*																			*/
/****************************************************************************/

#ifndef _LPC210X_CRP
#define _LPC210X_CRP

/*
*	The code protection word is located at 0x1fc in the flash. Depending on
*	its value, access to the chip is limited. Four levels ar defined.
*/

#define	CRP_ADDRESS		0x000001fc

/*
*	Unprotected, access to the FLASH and RAM is not limited.
*	Any value would do other than the thee defined below. We define
*	the unprogrammed FLASH state for this purpose.
*/

#define	CPR_CRP0		0xffffffff

/*
*	JTAG is disabled.
*	Sector 0 of the FLASH can not be erased or written by ISP.
*	The ISP command COMPARE is disabled.
*/

#define	CPR_CRP1		0x12345678

/*
*	JTAG is disabled.
*	The READ, WRITE_TO_RAM, GO, COPY_RAM_TO_FLASH and COMPARE commands
*	are not available via the ISP.
*/

#define	CPR_CRP2		0x87654321

/*
*	JTAG is disabled.
*	ISP is disabled as long as the vector table checksum is OK.
*/

#define	CPR_CRP3		0x43218765

#endif

